PURPOSE: To reduce overhead by suppressing the writing operation of a block in a buffer storage device when data to be transferred start from the final word of the block.

CONSTITUTION: When a transfer start signal for one block is energized, a decoder DEC22 is activated and an address in the buffer storage device is set up in an address register BSAR21. If the address indicates the final word of the block, an output line 11 of the decoder 22 is energized. Since an MFF23 is turned on by a move instruction, an AND is found out by an NAND circuit 24, a transfer cycle specification control signal MCYCLE inputted to an AND circuit 25 is blocked and the output signal MOVEIN is suppressed. Since the final word of the block is necessary data, the final word is transferred to a CPU through a bypass route and an OR circuit.