PURPOSE: To output a data from a high speed device when a low speed device receives the data with respect to the data transfer speed conversion circuit transferring the data from the device at high. speed operation to the device at low speed operation in the case of outputting the data to an external bus and memory operated at a low speed from a high speed LSI.
CONSTITUTION: Other registers than those in which a high speed device 51 writes a final data are divided into 1st registers 10 to receive a data at a high speed and 2nd registers 11 to output a data to a low speed device 52 at a low speed, the data is transferred from the 1st register 10 to the 2nd register 11 till the high speed device 51 writes the final data and the register 11 gives the data to the low speed device 52 thereby converting the data transfer speed.
TASHIRO YUTAKA
YAMAUCHI HIROKI
