PURPOSE: To shorten a data processing time, by transferring data to a data processor in parallel every time the number of bits of converted data reaches a specific value, and detecting a start mark.
CONSTITUTION: Data read by a reader in bit series is sent through a data line 3 to a serial-parallel converter 1, where it is converted into parallel data in response to a clock signal from a clock signal line 2. When the number of bits of the parallel data reaches, for example, eight, a counter 6 sends an output signal to a 8-bit latch/bus driver 4 to be sent out to a data bus 5. A latch circuit 7, on the other hand, is set by the output signal of the counter 6 and an interruption signal is sent to a CPU. Thus, no start mark detecting circuit is used, so the amount of hardware is reduced and data is processed at a high speed because of the parallel processing.
JPS5640946A | 1981-04-17 | |||
JPS54124944A | 1979-09-28 |