PURPOSE: To transmit packet densely and to heighten efficiency of data transmission by providing a circuit that adds a head signal at the head position of an encoded data signal.

CONSTITUTION: An encoding circuit 2 encodes input data signals (q) by a specified process such as a Manchester process etc. and outputs. A header forming circuit 3 generates and outputs a head signal (r), a no-coding signal (NRZ signal), in response to inputting of the data signal (q). An OR gate 4 acts as an adding circuit that adds the head signal (r) at the head position of an encoded data signal (s) which is output of the encoding circuit 2, and its input terminals are connected respectively to output side of the encoding circuit 2 and header forming circuit 3. A packet controlling circuit 5 outputs a controlling signal (t) corresponding to packet length in response to inputting of the data signal (q). A tristate buffer 6 is in the rear stage of the OR gate 4 and opens the course of transmission from the OR gate 4 responding to inputting of the controlling signal t.