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Title:
DATA TRANSMISSION SYSTEM
Document Type and Number:
Japanese Patent JPH02132944
Kind Code:
A
Abstract:

PURPOSE: To speed up the data transmission by providing a memory to collectively register a transmission source station address and a transmission destination station address to a master station side, an own station address setting part, a comparing part and the like and attaining the data transmission without interposing a CPU.

CONSTITUTION: At a master station, the transmission frame to a slave station is provided on a memory 1, a transmission source station address and a transmission destination station address are collectively registered onto the memory 1 and transmitted to a slave station side as polling data. At the time of transmission, the own station address from an own station address setting part 15 and the transmission source station address on the transmission frame are compared by a comparing part 16. As the result, when both are coincident, the response waiting condition from the slave station is obtained, and when they are non-coincident, the idle waiting condition of a transmission line is obtained and as such, the diagnosis switching at the time of reception is executed. On the other hand, at the slave station side, the transmission source station address on the transmission frame format from the master station and the transmission destination station address are exchanged, it is discriminated whether or not the transmission source station address is a a master station, and only at the time of the master station, the response is returned to the master station. Thus, without interposing the CPU, the high speed data transmission can be executed.


Inventors:
Naraba, Keizou
Ote, Takeshi
Application Number:
JP1988000285677
Publication Date:
May 22, 1990
Filing Date:
November 14, 1988
Export Citation:
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Assignee:
TOSHIBA CORP
International Classes:
G06F13/00; H04L12/40; (IPC1-7): G06F13/00; H04L12/40
Domestic Patent References:
JPS635452A
JPS608966A
JPS63269643A



 
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