DATA TRANSMITTER

Japanese Patent JP3568180

B2

PROBLEM TO BE SOLVED: To provide a stable synchronism detection circuit by previously inserting a prescribed synchronous symbol group into a transmission signal, taking the absolute value of the digital signal of the transmission signal, judging the amplitude of a reception signal, detecting a non-signal period, detecting the start point of the other synchronous symbol following the non-signal period and adjusting the operation timing of a demodulator to synchronous timing.
SOLUTION: A signal from an OFDM modulator is converted into an IF frequency in the RF/IF demodulator 61, it is set to be the OFDM signal of a base band and it is converted in an A/D converter 62. The output of the A/D converter 62 is inputted to a controller for demodulator 10 and it is made into the absolute value in an absolute value circuit 9. A signal S10 which is made into the absolute value is inputted to a low pass filter 1 and a signal S12 whose size is compared/judged in a reception signal amplitude judgment unit 13 is obtained. The signal S12 is inputted to a non-signal period detector 14. Only when a pair of the null period detection signal of the detector 14 and the sweep signal of a reception part timing controller 17 are detected, they are judged to be correct synchronizing signals and the synchronizing signals are distributed.

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Seiichi Sano
Toshiyuki Akiyama
Atsushi Miyashita
Nobuo Tsukamoto

JP15559197A

September 22, 2004

June 12, 1997

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Hitachi Kokusai Electric Co., Ltd.

H04J11/00; H04L7/00; H04L27/26; (IPC1-7): H04J11/00; H04L7/00

JP7321762A
JP8316800A
JP8102769A

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