Title:
DC STABILIZING CIRCUIT
Document Type and Number:
Japanese Patent JPH01198278
Kind Code:
A
Abstract:
PURPOSE:To improve the power factor, by triggering an element for controlling DC output with an inversely proportional timing. CONSTITUTION:An AC power source 10 is connected to a transformer 12 having outputs connected respectively with a level control circuit 14 and a rectifier 24. Output voltage from the level control circuit 14 is divided and fed to a differential amplifier 22. Output voltage from the rectifier 24 is applied onto a series circuit of a resistor 32 and a Zener diode 34 thence onto the differential amplifier 22. Output of the differential amplifier 22 is connected to the base of a transistor(Tr)50, and a trigger output is fed through a trigger circuit 54 and a capacitor 56 to a thyristor SA. Output of the differential amplifier 22 is also connected to a differential amplifier (inverter) 60 in order to drive Tr66 thus driving a thyristor SB through a trigger circuit 70 and a capacitor 72. Since the thyristors SA, SB are triggered in inverse proportional, the power factor is improved.
Inventors:
MATSUNAGA ARATA
Application Number:
JP2020088A
Publication Date:
August 09, 1989
Filing Date:
January 31, 1988
Export Citation:
Assignee:
NEC CORP
International Classes:
H02M7/155; H02M7/12; (IPC1-7): H02M7/155
Domestic Patent References:
| JPS5537938U | 1980-03-11 | |||
| JPS5241849A | 1977-03-31 |
Attorney, Agent or Firm:
Takahashi Isamu
Previous Patent: SEMI-CONDUCTOR POWER CONVERTER
Next Patent: CABLE TELEVISION TELEPHONE SYSTEM, TERMINAL EQUIPMENT, AND CENTER DEVICE
Next Patent: CABLE TELEVISION TELEPHONE SYSTEM, TERMINAL EQUIPMENT, AND CENTER DEVICE