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Title:
DE-EMPHASIS CIRCUIT
Document Type and Number:
Japanese Patent JP2003163609
Kind Code:
A
Abstract:

To provide a de-emphasis circuit capable of effectively performing de-emphasis in a 1-bit signal switching amplifier.

A 1-bit amplifier 1 is provided with the de-emphasis circuit so as to de-emphasize signals after 1-bit signals f generated in a ΔΣ modulation 1-bit conversion circuit 2 are amplitude-amplified in a switching amplifier circuit 3 and outputted as switching signals g until reproducing signals h are outputted to reproducing signal driving equipment K by a demodulation circuit 4, the signals of the demodulation circuit 4 in this case. A pre-emphasis detection circuit 5 detects an emphasis detection code i from an audio signal source S and outputs the presence/absence and the kind of pre-emphasis by detection signals j and the de-emphasis circuit switches the presence/absence and the kind of the de-emphasis by an operation of a relay circuit 6.


Inventors:
SATO SHOJI
Application Number:
JP2001361580A
Publication Date:
June 06, 2003
Filing Date:
November 27, 2001
Export Citation:
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Assignee:
SHARP KK
International Classes:
H03G7/00; H03F3/217; H03M7/32; H04B1/62; H04B14/06; (IPC1-7): H04B1/62; H03G7/00; H03M7/32; H04B14/06
Attorney, Agent or Firm:
Kenzo Hara



 
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