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Title:
DEAD TIME GENERATION CIRCUIT
Document Type and Number:
Japanese Patent JP2005261091
Kind Code:
A
Abstract:

To provide a dead time generation circuit high in accuracy for variations of a temperature and a power supply voltage.

The dead time generation circuit comprises a capacitor C1; a control part 1 that charges the capacitor C1 with a current I1 when an input signal Vin is in an L-level, and discharges the capacitor C1 with a current I2(=I1) when the input signal Vin is in an H-level; a comparator 2 that compares a charging voltage Vc of the capacitor C1 with a reference voltage VH; and a comparator 3 that compares a charging voltage Vc of a capacitor C2 with a reference voltage VL(<VH). A dead time is generated by the combination of output voltages Vout1, Vout2 of the comparators 2, 3.


Inventors:
TAKAYANAGI MASAYUKI
Application Number:
JP2004069904A
Publication Date:
September 22, 2005
Filing Date:
March 12, 2004
Export Citation:
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Assignee:
NEW JAPAN RADIO CO LTD
International Classes:
H02M7/537; H02M7/5387; H02P7/29; H02P7/291; H03K5/04; H03K17/16; (IPC1-7): H02P7/29; H02M7/537; H02M7/5387; H03K5/04; H03K17/16
Attorney, Agent or Firm:
Tsuneaki Nagao