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Title:
DEBUGGING DEVICE FOR MICROPROCESSOR
Document Type and Number:
Japanese Patent JPH0320836
Kind Code:
A
Abstract:

PURPOSE: To allow the execution of the program of a task other than the one on which debugging is desired to be continued as it is by providing an execution state output means for the present task, an interruption input means to execute a debugging mode, and a recognizing means to show by which task interruption input is accepted.

CONSTITUTION: The output of a timing generator 5 activates one of terminals 51-59 corresponding to the task being executed at present via a state output means 50. When an interruption element signal 2 for debugging is generated, interruption is received via an interruption input part 3, and an interruption reception signal 10 is outputted via an interruption recognizing part 60, and furthermore, one of terminals 61-69 corresponding to the task being executed at present is activated, and the program counter 1 of the task is stopped, and a processing is migrated to an interruption processing, then, a service program for debugging is executed.


Inventors:
URADE MASAKAZU
OKAMOTO TOMONOBU
Application Number:
JP15533289A
Publication Date:
January 29, 1991
Filing Date:
June 16, 1989
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
G06F11/28; G06F9/46; G06F9/48; (IPC1-7): G06F9/46; G06F11/28
Attorney, Agent or Firm:
Shigetaka Awano (1 person outside)



 
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