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Title:
DEBUGGING SYSTEM FOR FIRMWARE
Document Type and Number:
Japanese Patent JPH02213952
Kind Code:
A
Abstract:

PURPOSE: To shorten the debugging time by producing automatically a flow chart of firmware based on the executing address of the firmware.

CONSTITUTION: An input means 20 is prepared to read an executing address out of an address trace memory together with a flow chart production means 21 which produces a flow chart based on the input executing address, a source list file, and a symbol library, and an output means 22 which outputs the produced flow chart. In other words, the means 20 reads the executing address out of the address trace memory and the means 21 produces a flow chart based on the executing address, the source list file, and the symbol library. Then the means 22 outputs the produced flow chart. Thus the firmware debugging efficiency is improved.


Inventors:
MORIOKA ATSUSHI
Application Number:
JP3480189A
Publication Date:
August 27, 1990
Filing Date:
February 14, 1989
Export Citation:
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Assignee:
NEC CORP
International Classes:
G06F11/28; G06F11/32; (IPC1-7): G06F11/28; G06F11/32
Attorney, Agent or Firm:
Ozeki Shinsuke



 
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