To provide a decimation filter that implements a satisfactory filter characteristic without requiring many arithmetic devices.
The decimation filter includes: an initial stage arithmetic unit having a buffer memory for selectively outputting an input first signal, a coefficient memory for outputting a filter coefficient by a ring buffer method, and an arithmetic device for performing a filter operation using the data output from the buffer memory and the filter coefficient output from the coefficient memory; and second stage and subsequent arithmetic units each having a buffer memory for outputting the data output from the preceding stage buffer memory with a delay, a coefficient buffer memory for outputting the filter coefficient output from the preceding stage coefficient memory or coefficient buffer memory with a delay, and an arithmetic device for performing a filter operation using the data output from the relevant stag buffer memory and the filter coefficient output from the relevant stage coefficient buffer memory.
JPH05248897 | REAL TIME FUZZY SMOOTHING FILTER |
JPH06269085 | MICROPHONE EQUIPMENT |
JPH0640615 | [Title of Invention] Digital signal processing circuit |