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Title:
DECIMATION FILTER
Document Type and Number:
Japanese Patent JP2012227594
Kind Code:
A
Abstract:

To provide a decimation filter that implements a satisfactory filter characteristic without requiring many arithmetic devices.

The decimation filter includes: an initial stage arithmetic unit having a buffer memory for selectively outputting an input first signal, a coefficient memory for outputting a filter coefficient by a ring buffer method, and an arithmetic device for performing a filter operation using the data output from the buffer memory and the filter coefficient output from the coefficient memory; and second stage and subsequent arithmetic units each having a buffer memory for outputting the data output from the preceding stage buffer memory with a delay, a coefficient buffer memory for outputting the filter coefficient output from the preceding stage coefficient memory or coefficient buffer memory with a delay, and an arithmetic device for performing a filter operation using the data output from the relevant stag buffer memory and the filter coefficient output from the relevant stage coefficient buffer memory.


Inventors:
MASUMOTO TAKAHIKO
Application Number:
JP2011091019A
Publication Date:
November 15, 2012
Filing Date:
April 15, 2011
Export Citation:
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Assignee:
YOKOGAWA ELECTRIC CORP
International Classes:
H03H17/00; H03H17/02



 
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