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Title:
DECODER CIRCUIT
Document Type and Number:
Japanese Patent JPS6469124
Kind Code:
A
Abstract:

PURPOSE: To facilitate the detection of an input fault of a decoder circuit by adding a circuit applying abnormality discrimination depending on a current sensing between a test signal line and a reference signal line.

CONSTITUTION: The titled circuit consists of a test signal line 490 connecting to N-channel transistors(NCH-TR) 405.415...475 turned on when outputs of inverters 400.410...470 go to '1', NCH-TR 800∼807, a reference signal line 890 connected to the NCH-TRs 800∼807, a known current sense amplifier (sense amplifier) 700 sensing a current flowing to the test signal line 490 and the reference signal line 890, an output signal line 900 of the sense amplifier 700, a power supply line 600 of each circuit and a ground line 650. The impedance between the circuit connected with plural TRs in parallel and the reference circuit is compared to output a comparison signal. Thus, a fault of the decoder output is detected easily.


Inventors:
ABE HIDEO
WAKAO IKUTARO
Application Number:
JP1987000227611
Publication Date:
March 15, 1989
Filing Date:
September 10, 1987
Export Citation:
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Assignee:
NEC CORP
International Classes:
H03M7/00; G11C11/408; G11C11/413; (IPC1-7): H03M7/00