Title:
DECODER, RECEIVER, AND RADIO WAVE CLOCK
Document Type and Number:
Japanese Patent JP2009055269
Kind Code:
A
Abstract:
To solve the problem that power consumption was large because a circuit scale was large due to a large-scale storage capacity.
An error detection and correction circuit detects whether a bit D0(ta) or a bit D1(ta) includes an error by comparing bits D0(ta), D0(tb) and D1(ta), and D1(tb), and corrects a detected error.
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Inventors:
MIZUKAMI HIROMITSU
Application Number:
JP2007219376A
Publication Date:
March 12, 2009
Filing Date:
August 27, 2007
Export Citation:
Assignee:
SEIKO EPSON CORP
International Classes:
H03M13/11; G04G5/00; G04R20/00; G04R20/30
Attorney, Agent or Firm:
Masahiko Ueyanagi
Osamu Suzawa
Kazuhiko Miyasaka
Osamu Suzawa
Kazuhiko Miyasaka
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