PURPOSE: To obtain the delay time specified independently of the variation in the power supply voltage, by constituting the delay circuit with the depletion MOS (DMOS) as the load resistive element, three enhancement MOS(EMOS), resistors and capacitors.

CONSTITUTION: When the switch 3 is turned off at time t0, the gate voltage V1 of EMOS 8, 9 (waveform B) is increased with the charging circuit of resistor 4 and capacitor 5, and EMOS 8 is conductive at time t1 when it reaches the threshold voltage VTS of EMOS 8. The voltage Vs at point a (waveform C) starts to decrease at time t1 with the difference between the power supply voltage VDD and the threshold voltage VTIG of EMOS 10. At the time t2 when the voltage V1 is greater than the value adding the voltage V9 to the threshold voltage VT9 of EMOS 9, EMOS 9 starts conduction, and the voltage V0 at the output terminal 6 (waveform A) is suddenly decreased. The time Td from the switch 3 turned off to the time t2 is the delay time. By suitably deciding the constants β8 and β10determined at the manufacture of EMOS 8 and 10 and satisfying the equation A, the delay time Td is constant independently of the variation in the voltage VDD.