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Patent Searching and Data


Title:
DELAY CIRCUIT
Document Type and Number:
Japanese Patent JPS5933926
Kind Code:
A
Abstract:

PURPOSE: To give a desired change in a delay amount only either leading or trailing edge of a pulse signal waveform, by connecting a diode in parallel with a resistor of an integrating circuit.

CONSTITUTION: A resistor R1, variable capacitance diode D1 of an integrating circuit, and a resistor R2 and a variable capacitance diode D2 are connected in parallel between differential amplifier circuits IC1 and IC2 of emitter coupling and an amount of delay is made variable since the integrating constant is changed with a variable voltage source VD. Since a diode D3 is connected in parallel with the resistor R1, the diode D3 exists normally at the leading edge (rise) of a pulse signal inputted from an input terminal IN and the capacitance of the diode D1 is charged rapidly. The diode D3 is biased reversely at a trailing edge (fall) and the charge charged in the variable capacitance diode D3 is discharged through the resistor R1 according to a prescribed time constant.


Inventors:
TSUNODA TOYOJI
SAITOU TAKASHI
NIIZAKI SHINYA
Application Number:
JP14326282A
Publication Date:
February 24, 1984
Filing Date:
August 20, 1982
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
H03K5/13; H03K17/28; (IPC1-7): H03K17/28
Attorney, Agent or Firm:
Akio Takahashi