Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
DELAY CIRCUIT
Document Type and Number:
Japanese Patent JPS6083416
Kind Code:
A
Abstract:

PURPOSE: To obtain a delay circuit which generates a rising and a falling pulse synchronizing with a control signal by adding a differentiating circuit and a leading edge trigger type FF to a comparator for delay pulse wave generation.

CONSTITUTION: This delay circuit consists of the differentiating circuit composed of a capacitor 11 and a resistance 12, trigger circuit composed of an NPN transistor (TR), differentiating circuit composed of a capacitor 14 and a resistance 12, trigger circuit composed of an NPNTR16, comparator 100 for delay pulse wave generation, differentiating circuit composed of a capacitor 17 and a resistance 18, trigger circuit composed of an NPNTR19, and leading edge type FF200. Consequently, the delay circuit generates the rising delay pulse and falling delay pulse synchronizing with the control signal.


Inventors:
KOYAMA TAKAHIRO
SHIMIZU RIYOUHEI
Application Number:
JP19195583A
Publication Date:
May 11, 1985
Filing Date:
October 14, 1983
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
NIPPON ELECTRIC IC MICROCOMPUT
International Classes:
H03K5/13; (IPC1-7): H03K5/13
Attorney, Agent or Firm:
Uchihara Shin