PURPOSE: To execute a delay without moving a sample value between memories by bringing an address of a storing circuit to circulating control.
CONSTITUTION: By being subjected to access by an instruction address counter 5 for executing the counting by a method of the number of instructions of a sample period, write and readout instructions are applied to a storing circuit 2 of a prescribed number of stages from an instruction storing circuit 4 of a ROM. On the other hand, by an address counter 3 which responds to a counting input pulse from the circuit 4 and counts it by a method of the number of stages of the circuit 2, the circuit 2 is brought to circulating access in accordance with the number of instructions, a signal from a sampling circuit 1 does not move through each stage but is written on each stage of the circuit 2, and in the next circulating cycle, it is written in the same way from the first stage, and also information which has been written already on its stage is delayed and outputted. Accordingly, various kinds of different processings, etc. are executed effectively by a sample time unit without moving a sample value between memories.
JP3110412 | OPTICAL BUFFER UTILIZING CELL POINTER |
JPS6139996 | SUPERCONDUCTION DELAY LINE MEMORY DEVICE |
JP4385579 | Optical circuits and devices |
JPS59176837A | 1984-10-06 | |||
JPS59100500A | 1984-06-09 |