To provide a delay difference adjustment circuit in which a difference from delays through a plurality of signal lines is corrected without relying on manual operation.

A device is provided with a delay adjustment circuit 22 that applies a desired delay to 1st and 2nd signals. The 1st and 2nd signals are given to the delay adjustment circuit 22 via 1st and 2nd signal lines respectively, which receives the switched 1st and 2nd signals via the 2nd and 1st signal lines respectively. A phase difference detection circuit 23 receives the 1st and 2nd signals before and after the switching from the delay adjustment circuit 22 to detect the phase difference of the signals before and after the switching respectively. A phase difference storage circuit 24 stores respectively a 1st phase difference before switching and a 2nd phase difference after switching detected by the phase difference detection circuit 23. When the phase difference storage circuit 24 stores the 1st and 2nd signal phase differences, a phase difference comparator circuit 25 compares the phase differences. A counter 28 counts the phase difference based on the phase difference of the phase difference comparator circuit 25 and sets a desired delay to the delay adjustment circuit 22.