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Title:
DELAY LINE OF HIGH-FREQUENCY SUBSTRATE CIRCUIT AND METHOD OF MANUFACTURING DELAY LINE OF HIGH-FREQUENCY SUBSTRATE CIRCUIT
Document Type and Number:
Japanese Patent JP2009278253
Kind Code:
A
Abstract:

To provide a delay line for a high-frequency substrate circuit which has a small circuit scale and simple manufacturing process, and to provide a method of manufacturing the delay line for a high-frequency substrate circuit.

In the case of microstrip line, a print capacitor 14 is provided for a prescribed part in contact with a central conductor 13. In the case of triplate line, an upper ground layer with a dielectric layer 25 of a central conductor 23 in between is etched and an exposure part 26 is provided, and the exposure part 26 is provided with a print capacitor 24. The print capacitor adjusts a capacitor paste by distributing a dielectric to resin and the like, prints the capacitor paste to an area of prescribed thickness and a prescribed size, hardens it, and forms it.


Inventors:
YAMASHITA YUSUKE
SUZUKI RYOTA
Application Number:
JP2008126014A
Publication Date:
November 26, 2009
Filing Date:
May 13, 2008
Export Citation:
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Assignee:
TOSHIBA CORP
International Classes:
H01P9/00; H01P1/18; H01P3/08; H01P11/00
Domestic Patent References:
JPH0730401A1995-01-31
JP2001053224A2001-02-23
JPH04365201A1992-12-17
JP2004153767A2004-05-27
Foreign References:
US3656179A1972-04-11
Attorney, Agent or Firm:
Amagi International Patent Office