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Title:
遅延プロファイル推定装置及び相関器
Document Type and Number:
Japanese Patent JP3905541
Kind Code:
B2
Abstract:
A delay profile estimation apparatus and a correlating unit to obtain delay profile with suppressed noise are disclosed. The delay profile estimation apparatus includes a receiving unit (204) to receive a communication signal 1 (received signal), a conversion unit (220) to inverse-Fourier-transform a known pilot signal that consists of N samples, a correlating unit (222) to obtain a correlation value between the inverse-Fourier-transformed known pilot signal and the received signal, the correlating unit being connected to the receiving unit and the conversion unit, and a delay profile generating unit (224 and 226) for generating a delay profile of the received signal cased on the correlation value. The correlating unit cyclically shifts N samples of the received signal, or the N samples of the known pilot signal when calculating the correlation value corresponding to a phase difference between the inverse-Fourier-transformed known pilot signal and the received signal.

Inventors:
Daisuke Mitsukawa
Hiroyuki Seki
Yoshiki Tanaka
Application Number:
JP2004554953A
Publication Date:
April 18, 2007
Filing Date:
November 28, 2002
Export Citation:
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Assignee:
富士通株式会社
International Classes:
H04J11/00; G06F17/15; H04L25/02; H04L27/26
Domestic Patent References:
JP575568A
JP2001292125A
JP2000134176A
JP200059332A
JP200022657A
Other References:
平明徳、石津文雄、三宅真,周波数選択性フェージング環境におけるOFDM通信システムのタイミング同期方式,電子情報通信学会論文誌,日本,社団法人電子情報通信学会,2001年 7月 1日,Vol.J84-B,p.1255-1264
Attorney, Agent or Firm:
Tadahiko Ito