DELAY TIME MEASURING DEVICE OF VARIABLE DELAY CIRCUIT
Document Type and Number:
Japanese Patent JP3406439
PROBLEM TO BE SOLVED: To provide a device for accurately measuring a delay time without being affected by a periodical noise.
SOLUTION: The output signal of a VCO 10 is branched by a phase lock loop PLL, one of the branched signal is passed through a variable delay circuit 21 to be measured, and the other is directly received as the input signal of a phase comparator 40 and is subjected to phase comparison. With the output of the phase comparator 40, a control voltage 61 is fed back to the VCO 10 according to the response characteristics of a loop filter 50. Further, the signal of a frequency diffusion signal generator 70 for fluctuating to diffuse the influence of a periodical noise to the control voltage 61 of the VCO 10 is added by an adder 60. A delay time is measured from the average value of the frequency of the VCO 10 using a frequency counter 20.
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October 24, 1995
G01R31/319; G01R31/28; G01R31/3193; G01R35/00; H03L7/06; (IPC1-7): G01R31/319; G01R31/28; G01R35/00; H03L7/06