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Patent Searching and Data


Title:
DEMODULATION CIRCUIT
Document Type and Number:
Japanese Patent JPH10178458
Kind Code:
A
Abstract:

To provide a demodulation circuit in which the eliminating effect of a frequency offset is prevented by the increase in the frequency offset resulting in increasing an offset component in a reception symbol wave thereby causing considerable distortion to a waveform of the reception symbol wave.

A frame synchronization detection circuit 14 detects a frame synchronizing signal and provides a detection signal (d) to a counter circuit 15 by using a time given to one frame for the period, the counter circuit 15 counts the time by an oscillation signal P from a voltage controlled oscillator 10 to provide a count N to an error detection circuit 16. The error detection circuit 16 obtains a difference between a reference count stored in advance and a moving mean value of the count N for a plurality of number of times, provides the voltage corresponding to the difference to the voltage controlled oscillator 10 as a control voltage V so as to approach the frequency of an oscillation signal P to the frequency when no frequency offset is present.


Inventors:
ENOMOTO KOUKI
URABE KENZO
Application Number:
JP35358596A
Publication Date:
June 30, 1998
Filing Date:
December 17, 1996
Export Citation:
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Assignee:
KOKUSAI ELECTRIC CO LTD
International Classes:
H03D1/22; H04B1/26; H04L7/00; H04L7/08; H04L27/152; (IPC1-7): H04L27/152; H03D1/22; H04B1/26; H04L7/00; H04L7/08
Attorney, Agent or Firm:
Norio Iida