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Title:
DEMODULATOR FOR PULSE FREQUENCY MODULATION SIGNAL
Document Type and Number:
Japanese Patent JPS6165520
Kind Code:
A
Abstract:

PURPOSE: To improve the linearity without requiring strict waveform equivalence even if the band of a transmission line is narrow, by constituting the titled demodulator of a clamp circuit applying clamping at signal peak, a monostable multivibrator triggered at the falling of a pulse and a low pass filter.

CONSTITUTION: Since a capacitor 10 is charged when a signal potential gets higher than the clamp potential, the output impedance of a transistor (TR)9 is lower. TRs 9, 12, the capacitor 10 and a diode 11 clamp the signal peak to attain DC regeneration even to a pulse train subject strongly to band limit. Further, an inverter 13 inverts the signal to set an RS flip-flop at the rising of the signal and reset it at the rising of the signal through a delay circuit 14. The pulse width depends only on the delay time of a delay 14 and a pulse with constant width is obtained. The regenerated pulse is demodulated by a low pass filter.


Inventors:
TANAKA TSUTOMU
KUBO KIYOSHI
Application Number:
JP18670484A
Publication Date:
April 04, 1986
Filing Date:
September 06, 1984
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
H03K9/06; (IPC1-7): H03K9/06
Domestic Patent References:
JPS5224453A1977-02-23
JPS5223240A1977-02-22
Attorney, Agent or Firm:
Akira Kobiji (2 outside)



 
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