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Patent Searching and Data


Title:
DEMODULATOR
Document Type and Number:
Japanese Patent JPS62178046
Kind Code:
A
Abstract:

PURPOSE: To simplify the circuit constitution to reduce the quantity of operation considerably by using two signals having phases zero and π/2 respectively as sampling signals of an A/D converter to perform A/D conversion of an input signal independently.

CONSTITUTION: A signal P(t) obtained by subjecting a carrier frequency fc inputted to a terminal 1 to QPSK modulation in accordance with a formula I is converted to digital signals by A/D converters 2 and 3. The converter 2 samples the input signal by a signal S(t) having a frequency fs from a pulse generator 4, and the converter 3 samples the input signal by a signal S(t-Δt) obtained by shifting the signal of the generator 4 in a pulse shifting circuit 5 by a time expressed with a formula IV. If 3fs<fc<4fs and Δt=1/4fs are true, output signals A1(t) and A2(t) of converters 2 and 3 are expressed with formulas II and III (T: period). Outputs of converters 2 and 3 have ωc components eliminated by a phase rotating circuit 6, and orthogonal and in-phase component signals PI/T and -PQ/T of the input signal are obtained from terminals 8 and 9 by a PLL circuit 7 which generates a signal synchronized with 2ωc.


Inventors:
TAKAHASHI YASUFUMI
Application Number:
JP1792186A
Publication Date:
August 05, 1987
Filing Date:
January 31, 1986
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
H04L27/00; H04L27/22; (IPC1-7): H04L27/00; H04L27/22
Attorney, Agent or Firm:
Katsuo Ogawa