Title:
DEPOSITION OF COPPER LAYER AND INTEGRATED CIRCUIT
Document Type and Number:
Japanese Patent JP3644571
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To enhance the adhesion of a Cu layer to a diffused barrier material layer within an integrated circuit substrate by a method, wherein the receiving surface of the diffused barrier material layer deposited on a selected region of an IC is formed of a thin oxide layer in such a way as to join it to the Cu layer.
SOLUTION: A diffused barrier layer 10, having a surface 12 for receiving a Cu layer, is deposited on a selected region of an IC, and a second substrate layer 14 having a surface 16 is provided under the layer 10. The thin layer of the receiving surface 12 of the layer 10 is exposed 18 to a reactive oxygen seed to react to the exposure 18 and the thin layer is oxidized. This exposure 18 is stopped before the thickness of an oxide layer 20 exceeds a thickness of about 30&angst so as to form the surface 12 of the layer 10 in such a way as to join the surface 12 to the Cu layer. Thereby, the adhesion of the Cu layer to the layer 10 within an integrated circuit substrate can be enhanced.
Inventors:
Twen Nuen
Lawrence Jay.
Lynn Earl. Allen
Lawrence Jay.
Lynn Earl. Allen
Application Number:
JP19899197A
Publication Date:
April 27, 2005
Filing Date:
July 24, 1997
Export Citation:
Assignee:
Sharp Corporation
Sharp Microelectronics Technology Incorporated
Sharp Microelectronics Technology Incorporated
International Classes:
C23C16/06; H01L21/285; H01L21/3205; H01L21/768; H01L23/52; (IPC1-7): H01L21/3205; C23C16/06; H01L21/285
Domestic Patent References:
| JP6151410A | ||||
| JP5121356A | ||||
| JP6120479A | ||||
| JP8260131A | ||||
| JP8288242A |
Attorney, Agent or Firm:
Hidesaku Yamamoto