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Title:
【発明の名称】高密度の不揮発性記憶デバイス
Document Type and Number:
Japanese Patent JP2003504839
Kind Code:
A
Abstract:
This invention provides novel high density memory devices that are electrically addressable permitting effective reading and writing, that provide a high memory density (e.g., 1015 bits/cm3), that provide a high degree of fault tolerance, and that are amenable to efficient chemical synthesis and chip fabrication. The devices are intrinsically latchable, defect tolerant, and support destructive or non-destructive read cycles. In a preferred embodiment, the device comprises a fixed electrode electrically coupled to a storage medium having a multiplicity of different and distinguishable oxidation states wherein data is stored in said oxidation states by the addition or withdrawal of one or more electrons from said storage medium via the electrically coupled electrode.

Inventors:
Bossian, David, F.
Kur, Warner, Gee.
Lindsay, Jonathan, S.
Clausen, Peter, Christian
Glico, Daniel, Thomas
Application Number:
JP2001508444A
Publication Date:
February 04, 2003
Filing Date:
June 28, 2000
Export Citation:
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Assignee:
The Regents of the University of California
North Carolina State University
International Classes:
H01L21/8247; C07D487/22; C07D519/00; C07F17/02; G11C11/00; G11C11/56; G11C13/02; H01L27/115; H01L27/28; H01L51/30; (IPC1-7): H01L21/8247; H01L27/115
Domestic Patent References:
JPS6211159A1987-01-20
JPH02257682A1990-10-18
JPH0260166A1990-02-28
JPH0936389A1997-02-07
JPH11112060A1999-04-23
JPH02257682A1990-10-18
Attorney, Agent or Firm:
Atsushi Nakajima (2 outside)



 
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