Title:
【発明の名称】ディレイライン素子およびその製造方法
Document Type and Number:
Japanese Patent JP3083416
Kind Code:
B2
Abstract:
A delay line device comprises first and second substrates. The first substrate has a signal line centrally formed on one of main surfaces of a ceramic substrate, bonding electrodes formed in a peripheral portion of the main surface and a ground electrode formed over substantially the entire region of the other main surface thereof. The second substrate has bonding electrodes formed on one of main surfaces of a ceramic substrate identical in thickness and material to the above ceramic substrate and a ground electrode formed over substantially the entire region of the other main surface thereof. The delay line device is formed by superimposing the first and second substrates on one another so that the bonding electrodes of the first substrate face those of the second substrate and bonding the bonding electrodes of both substrates to one another. Such delay line devices can be manufactured using mother substrates and mother dummy substrates.
Inventors:
Nakamura
Makoto Kozaki
Makoto Kozaki
Application Number:
JP32238392A
Publication Date:
September 04, 2000
Filing Date:
November 06, 1992
Export Citation:
Assignee:
Susumu Industry Co., Ltd.
International Classes:
H01F17/00; H01F41/04; H01P3/08; H01P9/00; H01P11/00; H03H7/34; H05K3/36; H05K1/02; H05K1/03; H05K1/14; H05K3/32; H05K3/34; H05K3/46; (IPC1-7): H01P9/00; H01F17/00; H01F41/04; H01P3/08; H01P11/00; H03H7/34
Domestic Patent References:
| JP2111101A | ||||
| JP51142698A | ||||
| JP54103764A | ||||
| JP392001A | ||||
| JP58155105U | ||||
| JP6285004U | ||||
| JP3502025A |
Attorney, Agent or Firm:
Keiji Yamamoto