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Title:
DETECTING CIRCUIT OF OSCILLATION
Document Type and Number:
Japanese Patent JPS58204607
Kind Code:
A
Abstract:

PURPOSE: To obtain an oscillation detecting circuit with low power consumption and a small occupied area, by forming the titled circuit with two C-MOS inverter circuits and a load resistor.

CONSTITUTION: The load resistor R and the C-MOS inverter circuits 13, 14 connected in parallel are connected in series between power supply lines 11 and 12. Further, capacitors C1, C2 are connected between the output terminal of each inverter circuit and the power supply line 11 respectively. A rectangular wave signal is applied to the inverter circuit 13 and a signal is applied to the inverter circuit 14 via an inverter circuit NOT to control its conduction. The output of both inverter circuits is applied to an NOR circuit NOR, and an output signal is obtained from an output terminal OUT. Since the oscillation detecting circuit is formed in this way, only one load resistor having a large cccupied area is used and the oscillation detecting circuit with low power consumption and small occupied area is obtained.


Inventors:
TAKAGI YUUICHI
Application Number:
JP8743582A
Publication Date:
November 29, 1983
Filing Date:
May 24, 1982
Export Citation:
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Assignee:
TOKYO SHIBAURA ELECTRIC CO
International Classes:
H03K5/19; H03B1/00; H03D1/18; (IPC1-7): H03B1/00
Domestic Patent References:
JPS51150259A1976-12-23
Attorney, Agent or Firm:
Takehiko Suzue



 
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