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Title:
DETECTION CIRCUIT FOR MEMORY INCORRECT ACCESS PROGRAM
Document Type and Number:
Japanese Patent JPS5782296
Kind Code:
A
Abstract:

PURPOSE: To enable the pursuit of program mistake in a short time, by producing an interrupting signal only when the program is not normal, in detecting the program number performing memory access incorrectly.

CONSTITUTION: When a memory is incorrectly rewritten, the address is set to an address set register 3 externally and the program number which rewrites it normally is set to a program number set register 5 externally to operate a computer. When an instruction rewriting the memory of the set address is executed, since the content of a memory address register 2 and the content of the address set register 3 are coincident, it is detected with an AND gate 6, the processing program number register 4 and a program number set register 5 are dissident with the content as an NAND gate 7 and an interrupting signal 10 is outputted with a timing signal 9.


Inventors:
GOTOU UICHIROU
Application Number:
JP15744780A
Publication Date:
May 22, 1982
Filing Date:
November 07, 1980
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
G06F12/14; G06F11/00; (IPC1-7): G06F11/28; G11C29/00



 
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