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Patent Searching and Data


Title:
DETECTION FOR SYNCHRONIZING SIGNAL
Document Type and Number:
Japanese Patent JPS5825766
Kind Code:
A
Abstract:

PURPOSE: To detect surely a synchronizing signal even if a compression code error is generated by the defect of the line state or the like, by discriminating that a prescribed number of "0" data of compression picture signal data is continuous.

CONSTITUTION: Compression signal data (picture signal data VDT and synchronizing signal EOL) and a clock signal CLK transmitted from the transmission side through a line LINE are inputted to a serial data buffer 1, and compression signal data is stored successively in accordance with the clock signal. Compression signal data is taken out from the output terminal of the buffer 1 by a controlling circuit 4 and binary encoded and is sent to a recording part (which is not shown in figure). When compression signal data taken out from the buffer 1 includes "0" data, the output of an AND gate 2A is applied to a counter circuit 3; and when the counter circuit 3 counts a prescribed number of continuous "0" data which is the pattern of the synchronizing signal EOL, the counter circuit 3 sends a synchronizing signal detection output CAR to the controlling circuit 4 to report that the synchronizing signal is detected.


Inventors:
SUEZAKI EIICHI
MURAKAMI KOUICHI
Application Number:
JP12294881A
Publication Date:
February 16, 1983
Filing Date:
August 07, 1981
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
H04L7/08; H04N1/36; (IPC1-7): G08C15/06
Attorney, Agent or Firm:
Akio Takahashi