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Title:
DETECTOR FOR OVERFLOW AND UNDERFLOW OF COUNTER
Document Type and Number:
Japanese Patent JPH02189026
Kind Code:
A
Abstract:

PURPOSE: To simplify the circuit constitution by having only to supervise the state of two bits being a sign bit and the most significant bit(MSB) of a count of a counter to detect overflow and underflow of the counter.

CONSTITUTION: With a pulse signal 2 fed to a counter 1, a count 4 is incremented by 1 to be '1000' and both a sign bit 10 and the MSB 11 are changed. Since level '0' of the sign bit 10 before the change and level '1' of the sign bit 10 after the change are applied to an exclusive OR gate 13 in this case, its output is inverted to a level 1. Since two inputs '10' after the change are fed to an exclusive OR gate 14, its output goes to the level '1'. Thus, a detection signal of level 1 being the result of detecting overflow is outputted from an AND gate 15. Thus, the circuit constitution is simplified.


Inventors:
OBO RYOSAKU
Application Number:
JP836089A
Publication Date:
July 25, 1990
Filing Date:
January 17, 1989
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
H03K21/40; H03K23/00; (IPC1-7): H03K21/40
Domestic Patent References:
JPS61131654A1986-06-19
JPS59156049A1984-09-05
JPS56114071A1981-09-08
JPH0269823A1990-03-08
Attorney, Agent or Firm:
Hiroaki Tazawa (2 outside)



 
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