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Title:
DETERMINATION SYSTEM FOR DATA TRANSFER MODE
Document Type and Number:
Japanese Patent JPS6260053
Kind Code:
A
Abstract:

PURPOSE: To determine a data transfer mode speedily and to reduce the load on interface control by providing a comparing means which compares the timing values of messages and the quantities of the offset of data.

CONSTITUTION: A comparing part 127 compares the timing values MMo and MMi stored in shift registers 124 and 125 with a reference timing value MMc stored in a shift register 123 to determine and send out the timing value which allows execution processing. A comparing part 128, on the other hand, compares the quantities XXo and XXi of offset stored in the registers 124 and 125 with the reference quantity of offset stored in the register 123 to determine and output the quantity of offset which allows execution processing. Thus, the plural shift registers and comparing means are used in combination to determine a data transfer mode speedily and reduce the load on the interface control.


Inventors:
MIYAGI TAKEHISA
Application Number:
JP20031185A
Publication Date:
March 16, 1987
Filing Date:
September 10, 1985
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G06F13/38; G06F13/42; (IPC1-7): G06F13/42
Attorney, Agent or Firm:
Sadaichi Igita



 
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