To provide the synchronizing signal detecting device capable of high speed recovery of synchronization detecting even when the signal is out of synchronism.
When a synchronous pulse is detected during a detecting period stipulated by a window signal S16 by a decision circuit 15, an output signal FP including this synchronous pulse is outputted. On the other hand, when the synchronous pulse is not detected during this detecting period, the synchronous pulse is interpolated based on an interpolation FP16. Afterward, when the synchronous pulse is detected during a fixed period, then, based on an interpolation FP17 and a window signal 17 from a counter 17 with this detected synchronous pulse as a reference, the synchronous pulse is detected and interpolated.
SUZUKI TOMOHIRO
FUKUHARA KOJI
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