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Patent Searching and Data


Title:
DEVICE AND METHOD FOR DESIGNING INFORMATION
Document Type and Number:
Japanese Patent JP2004326812
Kind Code:
A
Abstract:

To secure the interoperability of information systems.

An assembly level process block 200 extracts a plurality of object assemblies from an object assembly storage part 900. A phase space level process block 300 designs an object assembly as phase space. An adhesion space level process block 400 specifies an equivalent relationship over the plurality of object assembles and designs an adhesion space to which partial spaces associated with one another by the equivalent relationship adhere. A cell space level process block 500 expresses the objects' attributes in the form of cells and designs the dimensions of the cells. An expression level process block 600 designs the expressions of the cells. A view level process block 700 designs view to users. A homotopy level process block 100 designs changes in the object assemblies as homotopy, which changes are caused by operations performed by each process block.


Inventors:
KUNII TOSHIYASU
Application Number:
JP2004133147A
Publication Date:
November 18, 2004
Filing Date:
April 28, 2004
Export Citation:
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Assignee:
KANAZAWA INST OF TECHNOLOGY
International Classes:
G06F17/50; G06F12/00; G06Q10/00; G06Q10/06; G06Q50/00; (IPC1-7): G06F12/00; G06F17/50; G06F17/60
Attorney, Agent or Firm:
Sakaki Morishita