Title:
DEVICE FOR REDUCING PHASE JITTER EFFECT IN DIGITAL DATA COM-MUNICATION ROUTE
Document Type and Number:
Japanese Patent JPS5961344
Kind Code:
A
Abstract:
A sinusoidal component of phase jitter in a communications channel is reduced by apparatus including means providing an oscillator signal at the receiver and modifying the received signal phase in accord therewith. Decision means determine the probable transmitted signal and the signals at the input and output of the decision means are compared to determine the residual phase jitter. The residual phase jitter is compared with a suitably delayed oscillator signal and the results of the comparison are used to alter the modification (by the oscillator signal) of the received signal to further reduce the phase jitter. Preferably the results of the comparison are also used to reduce the frequency difference between the oscillator signal and the phase jitter.
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Inventors:
GOODON AARU RANGU
FURETSUDO EMU RONGUSUTATSUFU
CHI EICHI RII
FURETSUDO EMU RONGUSUTATSUFU
CHI EICHI RII
Application Number:
JP15816683A
Publication Date:
April 07, 1984
Filing Date:
August 31, 1983
Export Citation:
Assignee:
II ESU II LTD
International Classes:
H04L27/06; H04L27/38; H04L27/227; (IPC1-7): H04L27/00; H04L27/22
Attorney, Agent or Firm:
Heikichi Odashima