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Title:
DEVICE FOR SUPPLYING MULTIPLE CLOCKS
Document Type and Number:
Japanese Patent JP3913231
Kind Code:
B2
Abstract:

PROBLEM TO BE SOLVED: To generate multiple clock signals so as to establish distinct phase relations between clock signals having different frequencies.
SOLUTION: A device adapted to supply a plurality of clock signals is obtained. The device is provided with a pair of clock signal circuits which generate m clock signals (m is a natural number) having at least two different signal periods. The device is provided with a super period signal generation unit which derives a first super period signal from a clock signal for exclusive use out of m clock signals. The signal period of the first super period signal is a common multiple of the signal periods of m clock signals.


Inventors:
Ralph Kirig
Application Number:
JP2004125305A
Publication Date:
May 09, 2007
Filing Date:
April 21, 2004
Export Citation:
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Assignee:
AGILENT TECHNOLOGIES, INC.
International Classes:
G06F1/04; G06F1/06; G06F1/12; H03K5/00; H03K23/64; (IPC1-7): G06F1/06; G06F1/04; G06F1/12; H03K5/00; H03K23/64
Domestic Patent References:
JP11202971A
JP3028913A
JP3186013A
JP4036671A
JP10303874A
JP60132222A
JP5052907A
JP5199498A
JP6097788A
JP2036614A
JP61224521A
Attorney, Agent or Firm:
Next student Okada
Naoya Fushimi
Yukari Hirano