Title:
DEVICE TEMPERATURE-STABILIZING SYSTEM AND SEMICONDUCTOR- TESTING APPARATUS PROVIDED WITH THE SYSTEM
Document Type and Number:
Japanese Patent JP3185882
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To obtain a device temperature-stabilizing system and a semiconductor- testing apparatus with which a temperature decrease of devices can be prevented even at a start of a screening test under a high temperature condition to the devices and at a test after interrupted.
SOLUTION: A handler control part 21 is provided with a socket temperature environment manage part 217 and a table 214a of a memory part 214 which stores a socket temperature judge condition corresponding to a type of a device 3. The socket temperature environment manage part 217 monitors a set state of the device 3 to a socket 24, and judges based on a predetermined reference a temperature decrease of the socket 24 to a temperature not higher than the socket temperature judge condition. When the temperature decrease is judged, a tester 1 carries out a preparatory test by a dummy program prior to an actual test, thereby letting the device 3 set to the socket 24 generate heat. A temperature of the device 3 is thus stabilized.
Inventors:
Satoshi Kaneko
Application Number:
JP34898098A
Publication Date:
July 11, 2001
Filing Date:
December 08, 1998
Export Citation:
Assignee:
NEC
International Classes:
G01R31/26; H01L21/66; (IPC1-7): G01R31/26; H01L21/66
Domestic Patent References:
| JP6258385A | ||||
| JP488650A | ||||
| JP351778A |
Attorney, Agent or Firm:
Nobuyuki Kaneda (2 others)
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