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Patent Searching and Data


Title:
DIFFERENTIAL AMPLIFIER CIRCUIT
Document Type and Number:
Japanese Patent JPH11214935
Kind Code:
A
Abstract:

To considerably improve a trans conductance and a current efficiency with a simple constitution, which is made not to increase a circuit scale by setting the ratio of two transistors in respective differential couples to be a specified value.

Two differential couples (M1, M2) and (M3, M4) driven by a constant current source Io are provided. In two MOS transistors constituting the respective differential couples, a ratio (W/L) of a gate width W and a gate length L is M1:M2=M4:M3=1:K (K≠1). In the two differential couples, the gates of the MOS transistors {(M1 and M3) (M2 and M4)} whose ratios (W/L) are not equal are connected in common to constitute a differential input terminal, where an input voltage Vin is applied. Also the drains of the MOS transistors the ratios (W/L) of which are not equal are connected in common to constitute a differential output terminal. The ratio (W/L) of the two MOS transistors in the respective differential couples is set to 1:95.


Inventors:
KIMURA KATSUHARU
Application Number:
JP30785098A
Publication Date:
August 06, 1999
Filing Date:
October 14, 1998
Export Citation:
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Assignee:
NEC CORP
International Classes:
H03F3/45; H03F1/08; H03F1/32; (IPC1-7): H03F3/45
Attorney, Agent or Firm:
Hachiman Yoshihiro