To provide a differential input circuit with a small delay time between its input and its output that can receive differential signals stipulated by the LVDS(Low Voltage Differential Signals) standards without disturbing the duty ratio because of a wide receptible input signal voltage range although the differential input circuit employs a low power supply voltage.

The differential input circuit is provided with a high level side differential amplifier 1 and a low level side differential amplifier 2 each having a noninverting input terminal IN+, an inverting input terminal IN-, an output terminal OUT and a different common mode input voltage range and receiving the same differential input signals, a comparator 3 that compares a voltage of the input signal with a reference voltage VR1 to output a selection signal corresponding to the result of comparison, and a selector 4 that selects and outputs one of output signals from the high level side differential amplifier 1 and the low level side differential amplifier 2 on the basis of the selection signal.