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Title:
DIFFERENTIAL OUTPUT CIRCUIT
Document Type and Number:
Japanese Patent JP2005130233
Kind Code:
A
Abstract:

To provide a differential output circuit in which low voltage and low power are realized, consequently the quality of output signals is improved and countermeasures against electrostatic discharge damage and the operation speed are improved.

In the differential output circuit, gates of first and second Trs (Trs) being a differential pair of the same conductive type connected to a first power source and first and second inputs are connected respectively, and sources of third and fourth Trs are connected in series to the drains of the first and second Trs respectively, and the drain of the third Tr is used as a first output, and the drain of the fourth Tr is used as a second output, and loads are connected between the first and second outputs and a second power source respectively, and the drains of fifth and sixth Trs connected to the first power source and sources of seventh and eighth Trs are connected in series respectively, and the gates of the fifth and sixth Trs are fixed to the same potential as the first power source, and the drain of the seventh Tr is connected to the first output, and the drain of the eighth Tr is connected to the second output, and gates of the third, fourth, seventh, and eighth Trs are connected.


Inventors:
HANSHIMOSEKI MAKOTO
Application Number:
JP2003364132A
Publication Date:
May 19, 2005
Filing Date:
October 24, 2003
Export Citation:
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Assignee:
RICOH KK
International Classes:
H03K19/003; H03K19/0175; (IPC1-7): H03K19/0175; H03K19/003
Attorney, Agent or Firm:
Akinaka Takano
Susumu Iwano