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Title:
DIGITAL-ANALOG CONVERTER
Document Type and Number:
Japanese Patent JPS60223330
Kind Code:
A
Abstract:

PURPOSE: To decrease the packaging area of a chip, to decrease the time constant and to attain high speed by converting a high-order m-bit into a weight current value by means of m-set of the 1st current switches having weight power supply sources and at the same time extracting an output voltage in response to the number of the 2nd current switches turned on gradually automatically.

CONSTITUTION: A current (is) is expressed as is=(W.B)×I0, where I0 is a unit weight current, W.B is a separating function and Wt is the total sum of weights. On the other hand, a current i's is expressed as i's=I0(Wt-W.X), the i's is decreased as the W.B increases and the (is) is increased. As a result, a current is switched sequentially from a current switch for setting a threshold value impressed with a V1. Collectors are connected in common and the current source i0 is equal, then the output voltage V0 is increased gradually. ON the other hand, current switches CS31∼CS34 are turned on or off by a low-order four-bit, and the output voltage V0is changed via an R-2R ladder resistance network. The output voltage V0 is changed according to the input bit of high-order four- bit and low-order four-bit.


Inventors:
HAYASHI SHINICHI
MAIO KENJI
Application Number:
JP7847084A
Publication Date:
November 07, 1985
Filing Date:
April 20, 1984
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
H03M1/68; (IPC1-7): H03M1/68
Attorney, Agent or Firm:
Akio Takahashi



 
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