To effectively simulate a neural network model by permitting a system to have the structure of a unique arithmetic equipment, a memory, a communication port and a program memory which are suitable for the numeral model.
The system is composed of the four blocks of the memory and a general purpose register block 10, the program memory and a control block 11, an arithmetic equipment block 12 and a communication block 13. Then, bus (BUS) is separated into the one 14 for a program and the one 15 for data. The operation of a processor is executed by following the command set in the program memory. The command can easily simulate the neural network and the configuration of the command decides the hardware structure of the processor. Therefore, the hardware (chip) for simulating the nural network model by using the VLSI technique of a present digital system is stably produced.
SOU YONSEN
KIN MEIGEN
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