To receive digital terrestrial broadcasts by a simple configuration.

A first PLL synthesizer 3 controls the frequency of local oscillated signals generated from a first VCO 4 by impressing a voltage having the magnitude corresponding to the phase difference between a reference- frequency signal supplied from a crystal oscillator 2 and the local oscillated signals generated from the VCO 4 upon the VCO 4 by referring to the reference- frequency signal, and so on. A second PLL synthesizer 9 controls the frequency of local oscillated signals generated from a second VCO 10 by comparing the phase of the local oscillated signals with that of the reference-frequency signal supplied from the oscillator 2 through the first PLL synthesizer 3 after adjusting the frequency of the reference-frequency signal by dividing the frequency, and so on. A 1/2 frequency divider 15 inputs the local oscillated signals generated from the second VCO 10, generates a sampling clock signal by dividing the frequency of the oscillated signals into 1/2 frequencies, and supplies the clock signal to a demodulation IC 14.