PURPOSE: To easily form the odd number frequency divider circuit by providing a 1st counter circuit, a 2nd counter circuit and a logic circuit so as to attain odd number frequency division without use of a multiplier.

CONSTITUTION: The circuit is provided with an original oscillation input signal terminal 1, an input terminal 3 at '1' and an input terminal 2 at '0' receiving respectively an integral part '2' of a quotient resulting from halving a frequency division value '5', and an inverter buffer 4 inverting the original oscillation input signal, and also a 1st counter circuit 5 counting the repetitive number of the input signal whose duty ratio is 50% and outputting a 1st carry signal at the rising of the input signal with the integral part of a quotient resulting from halving a frequency division value, a 2nd counter circuit 6 counting the repetitive number of the input signal and outputting a 2nd carry signal at the falling of the input signal with the integral part of a quotient resulting from halving a frequency division value, and a logic circuit outputting a frequency division signal with the 1st carry signal and the 2nd carry signal.