PURPOSE: To realize a high speed operation of the circuit by providing one transfer gate in a ratio of one to three digital operation blocks.

CONSTITUTION: An adding circuit is constituted by placing full adders 1, 4 and 7 in order, and a carry transfer control transfer gate 27 is provided only on the inside of the full adder 7. When the sum of data AK, BK of K-th digit and the sum of data AK.1, BK.1 of K+1-th digit, and the sum of data AK.2, BK.2 of (K+2)-th digit are all in an 'H' level, an output of an AND gate 22 becomes an 'H' level, the transfer gate 27 is turned ON and the output is transferred to carry of (K-1)-th digit from (K+2)-th digit. That is, the output of the AND gate 22 becomes a control signal for determining a carry transfer of three portions (3-digit portion) of the full adders 1, 4 and 7. In such a way, since the number of transfer gates becomes 1/3 of a conventional circuit, a high speed operation of the circuit can be realized.