PURPOSE: To attain parallel simulation of logical elements operated in parallel, by reading out a data from a career data storage means to attain operating processing, when the data is set from an input set means to an execution control means.
CONSTITUTION: The data relating to each element included in a digital circuit is set to an execution control unit 31 at each element, and the career data before a noted generation is stored in a function memory 32. The unit 31 and the memory 32 are connected directly, an input/output subsystem 2, operation processing units 4aW4b, and execution control means 3aW3c are connected individually via a common bus 1. When the input data is set from the subsystem 2 to the unit 31, the data relating to the element to which all data are set is given to the units 4aW4b corresponding to the unit 31 reading out the career data from the memory 32, and the units 4aW4b performs te logical operation of the corresponding elements.
| JPS60237379 | SIGNAL CHANGES DISPLAY |
| JPH04113468 | PARALLEL PROCESSING SYSTEM FOR LOGIC SIMULATION |
| JPH03251961 | EVOLVING SYSTEM FOR LOGIC SIMULATION CIRCUIT |
ASADA KATSUHIKO
NISHIKAWA HIROAKI
OKAMOTO TOSHIYA
TOKURA TAKESHI
SHIMIZU MASAHISA
KAMIMURA KAZUO
SHARP KK
MATSUSHITA ELECTRIC IND CO LTD
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