Title:
デューティサイクル不均衡補償を備えた線対用のデジタル通信受信器インターフェース回路
Document Type and Number:
Japanese Patent JP6382825
Kind Code:
B2
Abstract:
A circuit (200) includes: a diode bridge (210) having polarity-independent input terminals for coupling to a DALI bus, and having positive and negative output terminals, wherein the diode bridge receives a receive signal from the DALI bus; a galvanic isolation device (220) having an input for receiving the receive signal from the diode bridge, and an output for outputting the receive signal galvanically isolated from the diode bridge and the DALI bus; a receive signal threshold reference device (235) for setting a threshold voltage for the galvanic isolation device to respond to the receive signal; an amplifier (280) for receiving the galvanically isolated receive signal from the galvanic isolation device and outputting a binary digital signal via a low pass filter (290); and a first duty cycle control device (230, 270) for adjusting the timing of rising edges of the galvanically isolated receive signal with respect to its falling edges.
Inventors:
Rezeanu Stefan-Christian
Application Number:
JP2015537391A
Publication Date:
August 29, 2018
Filing Date:
October 11, 2013
Export Citation:
Assignee:
Philips Lighting Holding BV
International Classes:
H04L25/03; H03K5/04; H03K5/06; H04L25/49
Domestic Patent References:
JP2013225807A | ||||
JP2168855A | ||||
JP2003174769A | ||||
JP2015520882A | ||||
JP6077798A | ||||
JP6244650A |
Foreign References:
WO2011135098A1 | ||||
US8810148 |
Attorney, Agent or Firm:
Patent Services Corporation m&s Partners