To enable mode-switching for every test rate by synchronizing with address signal from digital function controller, outputting selection signal from an edge/window strobe selection memory circuit and selecting the mode of a digital comparator.

A digital comparator 3 compares an input digital signal with an expected value data in the timing of strobe signal and outputs the comparison results of equality inequality. At this point, the selection between 'edge- strobe mode' or 'window strobe mode' of the digital comparator 3 is performed, based on the mode selection signal from the edge/window strobe selection memory circuit 9 and the digital comparator 3 compares in this mode and the comparison result is stored in a fail memory circuit 8. That is, modes for every test rate is set in the edge/window strobe selection memory circuit 9, and so the digital comparator 3 becomes able to switch mode for every test rate according to the setting.