DIGITAL DATA REPRODUCING DEVICE

Japanese Patent JPH01276468

A

PURPOSE:To attain effective correspondence to both short period and long period error generation by controlling a data sampling phase in correspondence to an error detected result. CONSTITUTION:A digital signal DS, which is separated from a pseudo-video signal, is sent to a delay quantity variable circuit part 4 and the sampling phase of data sampling timing is changed corresponding to a control signal from a delay control circuit 5. A signal DDS from the circuit 4 is sent to a data sampling circuit 6 and data extraction is executed in each four-phase clock. Then, error detection is executed in an error detecting circuit 8 and a selection control circuit 10 outputs a prescribed judged result in correspondence to respective detecting signals. When the error generation is in the short period, a selecting circuit 11 is controlled corresponding to the detecting output of the circuit 8 and satisfactory data sampling is executed. When the error generation is in the long period, the delay quantity of the circuit 4 is controlled by the output of the circuit 5 and as a result, the optimum data sampling is executed.

MARUYAMA YUKIHIRO
YAHAGI YOSHIYUKI

JP10368988A

November 07, 1989

April 26, 1988

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SONY CORP

G11B20/10; G11B20/18; (IPC1-7): G11B20/10

Akira Koike (2 outside)

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